Semiconductor Engineering

Logic Synthesis Basics For FPGA

In the early days of digital design, all circuits were designed manually. You would draw K-map, optimize the logic and draw the schematics. If you remember, we all ...
Design-Reuse

New Lattice ispLEVER 4.0 Programmable Logic Design Tools Improve Design Efficiency, Ease Design Process

Major design tool upgrades unleash the power of Lattice programmable logic device technologies HILLSBORO, OR - May 4, 2004 - Lattice Semiconductor Corporation (NASDAQ: LSCC), the inventor of in-system ...
EDN

Mentor’s first wave of new FPGA synthesis tools targets 50 million gate designs

WILSONVILLE, Ore. — Three months after disclosing an ambitious plan to redefine design software for field programmable gate arrays, Mentor Graphics Corp. here is preparing to ship its first beta ...
EDN

Getting the most out of RTL logic synthesis

As chip designers, we take register-transfer-level logical synthesis for granted today. And that's a good thing. That means that we are all comfortable with it. I remember back in the early '90s when ...
Electronic Design

Make Logic Synthesis Work For YouSponsored by: CADENCE DESIGN SYSTEMS

Think Global RTL coding style and how you drive today's synthesis tools affect your results. Take advantage of global RTL optimizations by synthesizing big blocks in top-down fashion instead of ...
Electronic Design

Synthesis Attacks The Abstract

HARDWARE DESIGN is a process of refining an idea from a highly abstract form to a concrete, physical implementation. Along the way, a design is continually transformed from a given state of ...
Design-Reuse

Linking synthesis with DFT key for network switch ICs

As the challenges of network execution time reach new heights, the question of integrating synthesis and design-for-test (DFT) in the fabrication of high density networking devices merits reassessment ...