EDN

Defining the TLM-to-RTL Design Flow

As System-on-Chip (SoC) designs grow ever larger, design and verification flows are changing. A rich mix of features, increased software content, high intellectual property (IP) use and submicron ...
EDN

Flow delivers RTL that’s friendly to physical design

SAN MATEO, Calif. — In conjunction with Tera Systems Inc., LSI Logic Corp. has put together a methodology and tool flow that let customers know up-front if they are developing register-transfer-level ...
Nasdaq

Synopsys Unveils RTL Architect To Accelerate Design Closure

The RTL Architect product represents the industry's first physically aware RTL analysis, optimization, and signoff system built on a fast, multi-dimensional prediction engine for superior RTL handoff ...
Electronic Design

A flexible flow for inserting embedded compression logic in RTL

The standard approach for testing IC logic is the use of scan chains, with embedded compression as the standard approach for applying scan patterns. Embedded compression enables the same test quality ...
Business Wire

Cadence Unveils Joules RTL Design Studio, Delivering Breakthrough Gains in RTL Productivity and Quality of Results

Delivers up to 5X faster RTL convergence and up to 25% improved QoR RTL designers can rapidly get accurate insight into physical effects and actionable guidance on improving RTL Integrates with ...
Electronic Design

RTL-To-GDSII Flow Rolls For Structured ASICs

A collaboration between Magma Design Automation and ChipX has produced a unified RTL-to-GDSII structured ASIC design flow. Based on Magma's Blast Create and Blast Fusion tools, the flow supports ChipX ...
Design-Reuse

Siemens launches Tessent tool for Verilog and RTL design for test

The Tessent RTL Pro enables analysis and insertion of a large majority of their DFT logic very early in the design flow, performing quick synthesis and then running ATPG (automatic test pattern ...
Design-Reuse

Tenison Demonstrates First Solution Reusing HDL RTL in ESL Design

San Jose Calif. – November 21, 2005 – Tenison Design Automation, a company focused on delivering tools for accelerating ESL design, has announced the first public showing of VTOC and the ARM® ...
Semiconductor Engineering

Preparing For Test Early In The Design Flow

Until very recently, semiconductor design, verification, and test were separate domains. Those domains have since begun to merge, driven by rising demand for reliability, shorter market windows, and ...
Semiconductor Engineering

RTL Design-for-Power In Mobile SoCs

If you are one of the more than 2 billion smartphone users today, it is hard to imagine life without one! Breaking new frontiers, wearable smart devices and the Internet of things are the latest buzz.
it.tmcnet

Calypto and Real Intent Combine Products for Reliable RTL Flow

Calypto Design Systems, a California-based leader in ESL hardware design, have paired up with Real Intent, a company that specializes in early verification software and advanced sign-off of electronic ...
Embedded

The four Rs of efficient system design

New design languages and new chips and systems mean a whole new set of design gotchas for today's developers. Once-simple tasks become difficult and, thankfully, once-difficult tasks become easy. This ...