KHON2

Imec mitigates thermal bottleneck in 3D HBM-on-GPU architectures using a system-technology co-optimization approach

Imec presents the first comprehensive thermal study of 3D HBM-on-GPU integration using a system-technology co-optimization (STCO) approach. The study allows to identify and mitigate thermal ...
Semiconductor Engineering

Chiplets: Bridging The Gap Between The System Requirements And Design Aggregation, Planning, And Optimization

A technical paper titled “System and Design Technology Co-optimization of Chiplet-based AI Accelerator with Machine Learning” was published by researchers at Auburn University. “With the availability ...
T&D

Minimize Total System Costs with Co-Optimization

Co-optimizing generation and transmission in a single model endogenously identifies the least-cost mix of grid enablement and generation resources. Over a 15 to 20-year horizon, where compounding ...
Digi Times

Arm, Intel Foundry team up for leading-edge SoC designs

Arm and Intel Foundry Services (IFS) have announced a multigeneration collaboration in which chip designers will be able to build low-power system-on-chips (SoC) using Intel 18A technology. The ...
KVOA 4

Imec mitigates thermal bottleneck in 3D HBM-on-GPU architectures using a system-technology co-optimization approach

Holistic system-technology co-optimization (STCO) approach key in reducing peak GPU and HBM temperatures under AI workloads while enhancing performance density of future GPU-based architectures Imec ...